EPYC 8024P Specs

EPYC 8024P
8 Cores
16 Threads
2.4GHz Clock
Socket
SP6
iGPU
No GPU
GB6S 1,600
42%
GB6M 12,000
50%
CB23S - N/A
0%
CB23M - N/A
0%
Manufacturer
AMD
Architecture
Zen 4c
Family
EPYC 8004
Instruction Set (ISA)
x86-64
Codename
Siena
Vindhya
Siena 1CCD
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Market Segment
Server
Release Date
9/18/2023
Foundry
TSMC
TSMC (IO Die)
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Node
N5
N6 (IO Die)
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Die Size
78 mm²
388 mm² (IO Die)
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Transistor Count
7.5 Billion
11 Billion (IO Die)
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SP6
8 Cores
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16 Threads
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2.4GHz
3GHz Boost
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Overclocking
Locked
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Type
PCIe
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Transfer Rate
32GT/s
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Lanes
8
Bandwidth
32GB/s
Bi-directional
64GB/s
L0 Instruction
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L0 Data
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L1 Instruction
32KB/Core
8-way set associative
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L1 Data
32KB/Core
8-way set associative
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L2
1024KB/Core
8-way set associative
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L3
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32MB Shared
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16-way set associative
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Channels
6
Max Memory
3072GB
ECC
Supported
Bus Width/Channel
64Bit
Bus Width
384Bit
Clock
2400MHz
Transfer Rate
4800MT/s
Bandwidth/Channel
38.4GB/s
Bandwidth
230.4GB/s
TDP
90W
70W cTDP Down
100W cTDP Up
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Included Cooler
Not Included
PCIe 5.0 x96 Lanes
No GPU
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No NPU
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No Cellular
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