EPYC 9554 Specs

EPYC 9554
64 Cores
128 Threads
3.1GHz Clock
Socket
SP5
iGPU
No GPU
GB6S 1,900
50%
GB6M 18,995
79%
CB23S - N/A
0%
CB23M - N/A
0%
Manufacturer
AMD
Architecture
Zen 4
Family
EPYC 9004
Instruction Set (ISA)
x86-64
Codename
Genoa
Durango
Genoa 8CCD
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Market Segment
Server
Release Date
11/10/2022
Foundry
TSMC
TSMC (IO Die)
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Node
N5
N6 (IO Die)
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Die Size
8x 71 mm²
388 mm² (IO Die)
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Transistor Count
8x 6.6 Billion
11 Billion (IO Die)
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SP5
64 Cores
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128 Threads
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3.1GHz
3.8GHz Boost
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Overclocking
Locked
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Type
PCIe
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Transfer Rate
32GT/s
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Lanes
8
Bandwidth
32GB/s
Bi-directional
64GB/s
L0 Instruction
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L0 Data
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L1 Instruction
32KB/Core
8-way set associative
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L1 Data
32KB/Core
8-way set associative
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L2
1024KB/Core
8-way set associative
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L3
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256MB Shared
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16-way set associative
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Channels
12
Max Memory
6144GB
ECC
Supported
Bus Width/Channel
64Bit
Bus Width
768Bit
Clock
2400MHz
Transfer Rate
4800MT/s
Bandwidth/Channel
38.4GB/s
Bandwidth
460.8GB/s
TDP
360W
320W cTDP Down
400W cTDP Up
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Included Cooler
Not Included
PCIe 5.0 x128 Lanes
No GPU
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No NPU
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No Cellular
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