Xeon D-2752TER Specs

Xeon D-2752TER
12 Cores
24 Threads
1.8GHz Clock
Socket
BGA 2579
iGPU
No GPU
GB6S 1,190
32%
GB6M 7,400
31%
CB23S - N/A
0%
CB23M - N/A
0%
Manufacturer
Intel
Architecture
Ice Lake
Family
Xeon D
Instruction Set (ISA)
x86-64
Codename
Ice Lake-SP
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Ice Lake-SP-LCC
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Sunny Cove
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-
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Market Segment
Server
Release Date
2/1/2022
Foundry
Intel
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-
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Node
10nm+
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-
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Die Size
360 mm²
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-
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Transistor Count
19.5 Billion
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-
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12 Cores
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-
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24 Threads
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-
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1.8GHz
2.8GHz Boost
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-
-
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-
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Overclocking
Locked
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-
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Type
DMI
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-
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Transfer Rate
8GT/s
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Lanes
4
Bandwidth
4GB/s
Bi-directional
8GB/s
L0 Instruction
-
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L0 Data
-
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L1 Instruction
32KB/Core
8-way set associative
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-
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L1 Data
48KB/Core
12-way set associative
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L2
1280KB/Core
20-way set associative
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-
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-
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-
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L3
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20MB Shared
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10-way set associative
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-
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-
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Channels
4
Max Memory
1024GB
ECC
Supported
Bus Width/Channel
64Bit
Bus Width
256Bit
Clock
1334MHz
Transfer Rate
2667MT/s
Bandwidth/Channel
21.3GB/s
Bandwidth
85.3GB/s
TDP
77W
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Included Cooler
Not Included
PCIe 4.0 x32 Lanes
No GPU
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DL Boost
-
-
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No Cellular
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