M2 (8C9G-FL) vs NVIDIA Tegra 4
            M2 (8C9G-FL)
            
                
            
        
    
            NVIDIA Tegra 4
            
                
            
        
    | 8 Cores 8 Threads 3.49GHz Clock | 5 Cores 5 Threads 1.9GHz Clock | 
| Socket Unknown | Socket Unknown | 
| iGPU9-Core M2-FL 3.22 TFLOPS FP32 | iGPUTegra 4 60 GFLOPS FP32 | 
| GB6S 2,500 62% | GB6S N/A 0% | 
| GB6M 9,525 36% | GB6M N/A 0% | 
| CB23S 1,590 61% | CB23S N/A 0% | 
| CB23M 8,000 19% | CB23M N/A 0% | 
| ManufacturerApple | ManufacturerNVIDIA | 
| ArchitectureApple Silicon 11 | ArchitectureARMv7 | 
| FamilyM Series | Family - | 
| Instruction Set (ISA) AArch64 | Instruction Set (ISA) AArch32 | 
| Codename Staten - M2 P-Core Avalanche - - E-Core Blizzard | Codename - - - P-Core Cortex-A15 - - E-Core Cortex-A15 | 
| Market Segment Tablet | Market Segment Tablet | 
| Release Date 5/7/2024 | Release Date 3/1/2013 | 
| Foundry TSMC - - - | Foundry TSMC - - - | 
| Node N5P - - - | Node 28nm HPL - - - | 
| Die Size 155 mm² - - - | Die Size Unknown - - - | 
| Transistor Count 20 Billion - - - | Transistor Count Unknown - - - | 
| Unknown | Unknown | 
| 8 Cores 4 P-Cores - 4 E-Cores | 5 Cores 1 P-Cores - 4 E-Cores | 
| 8 Threads 4 P-Threads - 4 E-Threads | 5 Threads 1 P-Threads - 4 E-Threads | 
| P-Core 3.49GHz - - | - 1.9GHz - - | 
| - - - | - - - | 
| E-Core 2.42GHz - | - - - | 
| Overclocking Locked - - - | Overclocking Locked - - - | 
| Integrated Chipset - | Integrated Chipset - | 
| - - | - - | 
| - - | - - | 
| - - | - - | 
| - - | - - | 
| - - | - - | 
| - - | - - | 
| - - | - - | 
| L0 Instruction - - | L0 Instruction - - | 
| L0 Data - - | L0 Data - - | 
| L1 Instruction 192KB/P-Core 6-way set associative - - 128KB/E-Core 4-way set associative | L1 Instruction 32KB/Core 4-way set associative - - - - | 
| L1 Data 128KB/P-Core 4-way set associative - - 64KB/E-Core 2-way set associative | L1 Data 32KB/Core 4-way set associative - - - - | 
| L2 - - 16MB Shared 16-way set associative - - - - - - 4MB Shared (E-Core) 16-way set associative | L2 - - 2MB Shared 16-way set associative - - - - - - - - | 
| - - - - - - - - - - | - - - - - - - - - - | 
| - - - 8MB SLC Cache | - - - - | 
| Channels 2 | Channels 2 | 
| Max Memory 24GB | |
| ECC Not Supported | ECC Not Supported | 
| Bus Width/Channel 64Bit Bus Width 128Bit | Bus Width/Channel 32Bit Bus Width 64Bit | 
| Clock 3200MHz Transfer Rate 6400MT/s | Clock 933MHz 800MHz Transfer Rate 1866MT/s 1600MT/s | 
| Bandwidth/Channel 51.2GB/s Bandwidth 102.4GB/s | Bandwidth/Channel 7.5GB/s 6.4GB/s Bandwidth 14.9GB/s 12.8GB/s | 
| TDP 15W - - - | TDP Unknown - - - | 
| Temp 100°C Max - | - - - | 
| Included Cooler Not Included | Included Cooler Not Included | 
| PCIe 4.0 x4 Lanes | No PCIe | 
| 9-Core M2-FL 1152 Shaders 1398MHz 3.22 TFLOPS FP32 | Tegra 4 48 Shaders 672MHz 60 GFLOPS FP32 | 
| - | No NPU - | 
| - 16 Cores | - - | 
| 15.8 TOPS FP16 | -  | 
| - - | - - | 
| No Cellular | No Cellular | 
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