M2 Ultra (24C60G) vs M2 (8C10G)
M2 Ultra (24C60G)
M2 (8C10G)
|
24 Cores
24 Threads
3.5GHz Clock
|
8 Cores
8 Threads
3.49GHz Clock
|
|
Socket
Unknown
|
Socket
Unknown
|
|
iGPU
60-Core M2 Ultra
21.47 TFLOPS FP32
|
iGPU
10-Core M2
3.58 TFLOPS FP32
|
|
GB6S 2,700
67%
|
GB6S 2,640
65%
|
|
GB6M 21,150
79%
|
GB6M 9,750
37%
|
|
CB23S 1,695
65%
|
CB23S 1,600
62%
|
|
CB23M 28,570
66%
|
CB23M 8,630
20%
|
|
Manufacturer
Apple
|
Manufacturer
Apple
|
|
Architecture
Apple Silicon 11
|
Architecture
Apple Silicon 11
|
|
Family
M Series
|
Family
M Series
|
|
Instruction Set (ISA)
AArch64
|
Instruction Set (ISA)
AArch64
|
|
Codename
Rhodes-2C
-
M2 Ultra
P-Core
Avalanche
-
-
E-Core
Blizzard
|
Codename
Staten
-
M2
P-Core
Avalanche
-
-
E-Core
Blizzard
|
|
Market Segment
Desktop
|
Market Segment
Laptop
|
|
Release Date
6/5/2023
|
Release Date
6/6/2022
|
|
Foundry
TSMC
-
-
-
|
Foundry
TSMC
-
-
-
|
|
Node
N5P
-
-
-
|
Node
N5P
-
-
-
|
|
Die Size
940 mm²
-
-
-
|
Die Size
155 mm²
-
-
-
|
|
Transistor Count
134 Billion
-
-
-
|
Transistor Count
20 Billion
-
-
-
|
|
Unknown
|
Unknown
|
|
24 Cores
16 P-Cores
-
8 E-Cores
|
8 Cores
4 P-Cores
-
4 E-Cores
|
|
24 Threads
16 P-Threads
-
8 E-Threads
|
8 Threads
4 P-Threads
-
4 E-Threads
|
|
P-Core
3.5GHz
-
-
|
P-Core
3.49GHz
-
-
|
|
-
-
-
|
-
-
-
|
|
E-Core
2.42GHz
-
|
E-Core
2.42GHz
-
|
|
Overclocking
Locked
-
-
-
|
Overclocking
Locked
-
-
-
|
|
Integrated Chipset
-
|
Integrated Chipset
-
|
|
-
-
|
-
-
|
|
-
-
|
-
-
|
|
-
-
|
-
-
|
|
-
-
|
-
-
|
|
-
-
|
-
-
|
|
-
-
|
-
-
|
|
-
-
|
-
-
|
|
L0 Instruction
-
-
|
L0 Instruction
-
-
|
|
L0 Data
-
-
|
L0 Data
-
-
|
|
L1 Instruction
192KB/P-Core
6-way set associative
-
-
128KB/E-Core
4-way set associative
|
L1 Instruction
192KB/P-Core
6-way set associative
-
-
128KB/E-Core
4-way set associative
|
|
L1 Data
128KB/P-Core
4-way set associative
-
-
64KB/E-Core
2-way set associative
|
L1 Data
128KB/P-Core
4-way set associative
-
-
64KB/E-Core
2-way set associative
|
|
L2
-
-
48MB Shared
12-way set associative
-
-
-
-
-
-
4MB Shared (E-Core)
16-way set associative
|
L2
-
-
16MB Shared
16-way set associative
-
-
-
-
-
-
4MB Shared (E-Core)
16-way set associative
|
|
-
-
-
-
-
-
-
-
-
-
|
-
-
-
-
-
-
-
-
-
-
|
|
-
-
-
96MB SLC Cache
|
-
-
-
8MB SLC Cache
|
|
Channels
8
|
Channels
2
|
|
Max Memory
192GB
|
Max Memory
24GB
|
|
ECC
Not Supported
|
ECC
Not Supported
|
|
Bus Width/Channel
128Bit
Bus Width
1024Bit
|
Bus Width/Channel
64Bit
Bus Width
128Bit
|
|
Clock
3200MHz
Transfer Rate
6400MT/s
|
Clock
3200MHz
Transfer Rate
6400MT/s
|
|
Bandwidth/Channel
102.4GB/s
Bandwidth
819.2GB/s
|
Bandwidth/Channel
51.2GB/s
Bandwidth
102.4GB/s
|
|
TDP
180W
-
-
-
|
TDP
15W
-
-
-
|
|
Temp
100°C Max
-
|
Temp
100°C Max
-
|
|
Included Cooler
Not Included
|
Included Cooler
Not Included
|
|
No PCIe
|
PCIe 4.0 x4 Lanes
|
|
60-Core M2 Ultra
7680 Shaders
1398MHz
21.47 TFLOPS FP32
|
10-Core M2
1280 Shaders
1398MHz
3.58 TFLOPS FP32
|
|
-
|
-
|
|
-
32 Cores
|
-
16 Cores
|
|
31.6 TOPS FP16
|
15.8 TOPS FP16
|
|
-
-
|
-
-
|
|
No Cellular
|
No Cellular
|
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