M3 Ultra (28C60G) vs M4 Max (14C32G)
M3 Ultra (28C60G)
M4 Max (14C32G)
|
28 Cores
28 Threads
4.05GHz Clock
|
14 Cores
14 Threads
4.5GHz Clock
|
|
Socket
Unknown
|
Socket
Unknown
|
|
iGPU
60-Core M3 Ultra
21.47 TFLOPS FP32
|
iGPU
32-Core M4 Max
13.74 TFLOPS FP32
|
|
GB6S 3,220
79%
|
GB6S 3,990
98%
|
|
GB6M 27,750
104%
|
GB6M 22,690
85%
|
|
CB23S N/A
0%
|
CB23S 2,170
83%
|
|
CB23M N/A
0%
|
CB23M 22,500
52%
|
|
Manufacturer
Apple
|
Manufacturer
Apple
|
|
Architecture
Apple Silicon 13
|
Architecture
Apple Silicon 14
|
|
Family
M Series
|
Family
M Series
|
|
Instruction Set (ISA)
AArch64
|
Instruction Set (ISA)
AArch64
|
|
Codename
Palma-2C
-
M3 Ultra
P-Core
Everest
-
-
E-Core
Sawtooth
|
Codename
Brava
-
M4 Max
P-Core
AS14P
-
-
E-Core
AS14E
|
|
Market Segment
Desktop
|
Market Segment
Laptop
|
|
Release Date
3/5/2025
|
Release Date
10/30/2024
|
|
Foundry
TSMC
-
-
-
|
Foundry
TSMC
-
-
-
|
|
Node
N3B
-
-
-
|
Node
N3E
-
-
-
|
|
Die Size
2x 503 mm²
-
-
-
|
Die Size
519 mm²
-
-
-
|
|
Transistor Count
2x 92 Billion
-
-
-
|
Transistor Count
95 Billion
-
-
-
|
|
Unknown
|
Unknown
|
|
28 Cores
20 P-Cores
-
8 E-Cores
|
14 Cores
10 P-Cores
-
4 E-Cores
|
|
28 Threads
20 P-Threads
-
8 E-Threads
|
14 Threads
10 P-Threads
-
4 E-Threads
|
|
P-Core
4.05GHz
-
-
|
P-Core
4.5GHz
-
-
|
|
-
-
-
|
-
-
-
|
|
E-Core
2.75GHz
-
|
E-Core
2.75GHz
-
|
|
Overclocking
Locked
-
-
-
|
Overclocking
Locked
-
-
-
|
|
Integrated Chipset
-
|
Integrated Chipset
-
|
|
-
-
|
-
-
|
|
-
-
|
-
-
|
|
-
-
|
-
-
|
|
-
-
|
-
-
|
|
-
-
|
-
-
|
|
-
-
|
-
-
|
|
-
-
|
-
-
|
|
L0 Instruction
-
-
|
L0 Instruction
-
-
|
|
L0 Data
-
-
|
L0 Data
-
-
|
|
L1 Instruction
192KB/P-Core
6-way set associative
-
-
128KB/E-Core
4-way set associative
|
L1 Instruction
192KB/P-Core
6-way set associative
-
-
128KB/E-Core
4-way set associative
|
|
L1 Data
128KB/P-Core
4-way set associative
-
-
64KB/E-Core
2-way set associative
|
L1 Data
128KB/P-Core
4-way set associative
-
-
64KB/E-Core
2-way set associative
|
|
L2
-
-
64MB Shared
16-way set associative
-
-
-
-
-
-
4MB Shared (E-Core)
16-way set associative
|
L2
-
-
32MB Shared
16-way set associative
-
-
-
-
-
-
4MB Shared (E-Core)
16-way set associative
|
|
-
-
-
-
-
-
-
-
-
-
|
-
-
-
-
-
-
-
-
-
-
|
|
-
-
-
96MB SLC Cache
|
-
-
-
48MB SLC Cache
|
|
Channels
8
|
Channels
3
|
|
Max Memory
128GB
|
Max Memory
96GB
|
|
ECC
Not Supported
|
ECC
Not Supported
|
|
Bus Width/Channel
128Bit
Bus Width
1024Bit
|
Bus Width/Channel
128Bit
Bus Width
384Bit
|
|
Clock
3200MHz
Transfer Rate
6400MT/s
|
Clock
4267MHz
Transfer Rate
8533MT/s
|
|
Bandwidth/Channel
102.4GB/s
Bandwidth
819.2GB/s
|
Bandwidth/Channel
136.5GB/s
Bandwidth
409.6GB/s
|
|
TDP
180W
-
-
-
|
TDP
90W
-
-
-
|
|
Temp
100°C Max
-
|
Temp
100°C Max
-
|
|
Included Cooler
Not Included
|
Included Cooler
Not Included
|
|
No PCIe
|
No PCIe
|
|
60-Core M3 Ultra
7680 Shaders
1398MHz
21.47 TFLOPS FP32
|
32-Core M4 Max
4096 Shaders
1678MHz
13.74 TFLOPS FP32
|
|
-
|
-
|
|
-
32 Cores
|
-
16 Cores
|
|
36 TOPS FP16
|
38 TOPS INT8
|
|
-
-
|
-
-
|
|
No Cellular
|
No Cellular
|
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