M4 Max (14C32G) vs AMD Ryzen 7 5800X
M4 Max (14C32G)
AMD Ryzen 7 5800X
$270
|
14 Cores
14 Threads
4.5GHz Clock
|
8 Cores
16 Threads
3.8GHz Clock
|
|
Socket
Unknown
|
Socket
AM4
|
|
iGPU
32-Core M4 Max
13.74 TFLOPS FP32
|
iGPU
No GPU
- -
|
GB6 Single-Core
|
|
M4 Max (14C32G) - GB6S 3,990
x1.81
Ryzen 7 5800X - GB6S 2,205
x1
GB6 Multi-Core
|
|
M4 Max (14C32G) - GB6M 22,690
x2.21
Ryzen 7 5800X - GB6M 10,265
x1
CB23 Single-Core
|
|
M4 Max (14C32G) - CB23S 2,170
x1.36
Ryzen 7 5800X - CB23S 1,595
x1
CB23 Multi-Core
|
|
M4 Max (14C32G) - CB23M 22,500
x1.48
Ryzen 7 5800X - CB23M 15,245
x1
|
|
M4 Max (14C32G) - 409.6GB/s
x8
Ryzen 7 5800X - 51.2GB/s
x1
|
|
M4 Max (14C32G) - 90W
x1
Ryzen 7 5800X - 105W
x1.17
|
GB6S 3,990
98%
|
GB6S 2,205
54%
|
|
GB6M 22,690
85%
|
GB6M 10,265
38%
|
|
CB23S 2,170
83%
|
CB23S 1,595
61%
|
|
CB23M 22,500
52%
|
CB23M 15,245
35%
|
|
Manufacturer
Apple
|
Manufacturer
AMD
|
|
Architecture
Apple Silicon 14
|
Architecture
Zen 3
|
|
Family
M Series
|
Family
Ryzen 5000
|
|
Instruction Set (ISA)
AArch64
|
Instruction Set (ISA)
x86-64
|
|
Codename
Hidra
-
M4 Max
P-Core
AS14P
E-Core
AS14E
|
Codename
Vermeer
Breckenridge
Vermeer 1CCD
-
-
-
-
|
|
Market Segment
Laptop
|
Market Segment
Desktop
|
|
Release Date
10/30/2024
|
Release Date
11/5/2020
|
|
Foundry
TSMC
-
|
Foundry
TSMC
GlobalFoundries (IO Die)
|
|
Node
N3E
-
|
Node
N7
12LP (IO Die)
|
|
Die Size
519 mm²
-
|
Die Size
81 mm²
125 mm² (IO Die)
|
|
Transistor Count
95 Billion
-
|
Transistor Count
4.2 Billion
2.1 Billion (IO Die)
|
|
Unknown
|
AM4 |
|
14 Cores
10 P-Cores
4 E-Cores
|
8 Cores
-
-
|
|
14 Threads
10 P-Threads
4 E-Threads
|
16 Threads
-
-
|
|
P-Core
4.5GHz
-
|
-
3.8GHz
4.7GHz Boost
|
|
E-Core
2.75GHz
|
-
-
|
|
Overclocking
Locked
|
Overclocking
Unlocked
|
|
Integrated Chipset
-
|
Type
PCIe
|
|
-
-
|
Transfer Rate
16GT/s
|
|
-
-
|
Lanes
4
|
|
-
-
|
Bandwidth
8GB/s
|
|
-
-
|
Bi-directional
16GB/s
|
|
L0 Instruction
|
L0 Instruction
|
|
L0 Data
|
L0 Data
|
|
L1 Instruction
192KB/P-Core
6-way set associative
128KB/E-Core
4-way set associative
|
L1 Instruction
32KB/Core
8-way set associative
-
-
|
|
L1 Data
128KB/P-Core
4-way set associative
64KB/E-Core
2-way set associative
|
L1 Data
32KB/Core
8-way set associative
-
-
|
|
L2
-
-
32MB Shared
16-way set associative
4MB Shared (E-Core)
16-way set associative
|
L2
512KB/Core
8-way set associative
-
-
-
-
|
|
-
-
-
|
L3
32MB Shared
16-way set associative
|
|
48MB SLC Cache
|
-
|
|
Channels
3
|
Channels
2
|
|
Max Memory
96GB
|
Max Memory
128GB
|
|
ECC
Not Supported
|
ECC
Not Supported
|
|
Bus Width/Channel
128Bit
Bus Width
384Bit
|
Bus Width/Channel
64Bit
Bus Width
128Bit
|
|
Clock
4267MHz
Transfer Rate
8533MT/s
|
Clock
1600MHz
Transfer Rate
3200MT/s
|
|
Bandwidth/Channel
136.5GB/s
Bandwidth
409.6GB/s
|
Bandwidth/Channel
25.6GB/s
Bandwidth
51.2GB/s
|
|
TDP
90W
-
|
TDP
105W
131W Peak
|
|
Temp
100°C Max
|
Temp
90°C Max
|
|
Included Cooler
|
Included Cooler
|
|
No PCIe
|
PCIe 4.0 x20 Lanes
|
|
32-Core M4 Max
4096 Shaders
1678MHz
13.74 TFLOPS FP32
|
No GPU
-
-
- -
|
|
No NPU
|
|
|
16 Cores
|
-
|
|
38 TOPS INT8
|
-
|
|
No Cellular
|
No Cellular
|
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