M4 Max (14C32G) vs M2 Pro (10C16G)
M4 Max (14C32G)
M2 Pro (10C16G)
14 Cores
14 Threads
4.5GHz Clock
|
10 Cores
10 Threads
3.5GHz Clock
|
Socket
Unknown
|
Socket
Unknown
|
iGPU
32-Core M4 Max
13.74 TFLOPS FP32
|
iGPU
16-Core M2 Pro
5.73 TFLOPS FP32
|
GB6 Single-Core
|
|
M4 Max (14C32G) - GB6S 3,990
x1.49
M2 Pro (10C16G) - GB6S 2,680
x1
GB6 Multi-Core
|
|
M4 Max (14C32G) - GB6M 22,690
x1.84
M2 Pro (10C16G) - GB6M 12,340
x1
CB23 Single-Core
|
|
M4 Max (14C32G) - CB23S 2,170
x1.28
M2 Pro (10C16G) - CB23S 1,695
x1
CB23 Multi-Core
|
|
M4 Max (14C32G) - CB23M 22,500
x1.86
M2 Pro (10C16G) - CB23M 12,125
x1
|
|
M4 Max (14C32G) - 409.6GB/s
x2
M2 Pro (10C16G) - 204.8GB/s
x1
|
|
M4 Max (14C32G) - 90W
x1.5
M2 Pro (10C16G) - 60W
x1
|
|
M4 Max (14C32G) - 13.74 TFLOPS FP32
x2.4
M2 Pro (10C16G) - 5.73 TFLOPS FP32
x1
|
|
M4 Max (14C32G) - 38 TOPS INT8
x2.41
M2 Pro (10C16G) - 15.8 TOPS FP16
x1
GB6S 3,990
98%
|
GB6S 2,680
66%
|
GB6M 22,690
85%
|
GB6M 12,340
46%
|
CB23S 2,170
83%
|
CB23S 1,695
65%
|
CB23M 22,500
52%
|
CB23M 12,125
28%
|
Manufacturer
Apple
|
Manufacturer
Apple
|
Architecture
Apple Silicon 14
|
Architecture
Apple Silicon 11
|
Family
M Series
|
Family
M Series
|
Instruction Set (ISA)
AArch64
|
Instruction Set (ISA)
AArch64
|
Codename
Hidra
M4 Max
P-Core
AS14P
E-Core
AS14E
|
Codename
Rhodes-Chop
M2 Pro
P-Core
Avalanche
E-Core
Blizzard
|
Market Segment
Laptop
|
Market Segment
Laptop
|
Release Date
10/30/2024
|
Release Date
1/17/2023
|
Foundry
TSMC
|
Foundry
TSMC
|
Node
N3E
|
Node
N5P
|
Die Size
519 mm²
|
Die Size
285 mm²
|
Transistor Count
95 Billion
|
Transistor Count
40 Billion
|
Unknown
|
Unknown
|
14 Cores
10 P-Cores
4 E-Cores
|
10 Cores
6 P-Cores
4 E-Cores
|
14 Threads
10 P-Threads
4 E-Threads
|
10 Threads
6 P-Threads
4 E-Threads
|
P-Core
4.5GHz
|
P-Core
3.5GHz
|
E-Core
2.75GHz
|
E-Core
2.42GHz
|
Overclocking
Locked
|
Overclocking
Locked
|
Integrated Chipset
|
Integrated Chipset
|
L0 Instruction
|
L0 Instruction
|
L0 Data
|
L0 Data
|
L1 Instruction
192KB/P-Core
6-way set associative
128KB/E-Core
4-way set associative
|
L1 Instruction
192KB/P-Core
6-way set associative
128KB/E-Core
4-way set associative
|
L1 Data
128KB/P-Core
4-way set associative
64KB/E-Core
2-way set associative
|
L1 Data
128KB/P-Core
4-way set associative
64KB/E-Core
2-way set associative
|
L2
32MB Shared
16-way set associative
4MB Shared (E-Core)
16-way set associative
|
L2
24MB Shared
16-way set associative
4MB Shared (E-Core)
16-way set associative
|
48MB SLC Cache
|
24MB SLC Cache
|
Channels
3
|
Channels
4
|
Max Memory
96GB
|
Max Memory
32GB
|
ECC
Not Supported
|
ECC
Not Supported
|
Bus Width/Channel
128Bit
Bus Width
384Bit
|
Bus Width/Channel
64Bit
Bus Width
256Bit
|
Clock
4267MHz
Transfer Rate
8533MT/s
|
Clock
3200MHz
Transfer Rate
6400MT/s
|
Bandwidth/Channel
136.5GB/s
Bandwidth
409.6GB/s
|
Bandwidth/Channel
51.2GB/s
Bandwidth
204.8GB/s
|
TDP
90W
|
TDP
60W
|
Temp
100°C Max
|
Temp
100°C Max
|
Included Cooler
|
Included Cooler
|
No PCIe
|
No PCIe
|
32-Core M4 Max
4096 Shaders
1678MHz
13.74 TFLOPS FP32
|
16-Core M2 Pro
2048 Shaders
1398MHz
5.73 TFLOPS FP32
|
16 Cores
|
16 Cores
|
38 TOPS INT8
|
15.8 TOPS FP16
|
No Cellular
|
No Cellular
|
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