A18 Specs

A18
6 Cores
6 Threads
3.78GHz Clock
Socket
Unknown
iGPU
5-Core A18
GB6S 3,335
89%
GB6M 8,220
34%
CB23S - N/A
0%
CB23M - N/A
0%
Manufacturer
Apple
Architecture
Apple Silicon 14
Family
A Series
Instruction Set (ISA)
ARMv9.2-A
Codename
Tahiti
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A18
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Market Segment
Mobile
Release Date
9/9/2024
Foundry
TSMC
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Node
N3E
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Die Size
90 mm²
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Transistor Count
18 Billion
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Unknown
6 Cores
2 P-Cores
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4 E-Cores
6 Threads
2 P-Threads
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4 E-Threads
P-Core
3.78GHz
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E-Core
2GHz
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Overclocking
Locked
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Integrated Chipset
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L0 Instruction
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L0 Data
-
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L1 Instruction
192KB/P-Core
6-way set associative
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128KB/E-Core
4-way set associative
L1 Data
128KB/P-Core
4-way set associative
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64KB/E-Core
2-way set associative
L2
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8MB Shared
16-way set associative
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4MB Shared (E-Core)
16-way set associative
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16MB SLC Cache
Channels
1
Max Memory
8GB
ECC
Not Supported
Bus Width/Channel
64Bit
Bus Width
64Bit
Clock
3750MHz
Transfer Rate
7500MT/s
Bandwidth/Channel
60.0GB/s
Bandwidth
60.0GB/s
TDP
5W
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Included Cooler
Not Included
No PCIe
5-Core A18
640 Shaders
1450MHz
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16 Cores
35 TOPS
INT8
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No Cellular
Change Results