Intel Core Ultra 5 238V vs Qualcomm Snapdragon X Plus (X1P-42-100)
Intel Core Ultra 5 238V
Qualcomm Snapdragon X Plus (X1P-42-100)
|
8 Cores
8 Threads
4.7GHz Clock
|
8 Cores
8 Threads
3.2GHz Clock
|
|
Socket
BGA 2833
|
Socket
Unknown
|
|
iGPU
Arc 130V 1850MHz
3.32 TFLOPS FP32
|
iGPU
Adreno X1 1.7T
1.71 TFLOPS FP32
|
GB6 Single-Core
|
|
Core Ultra 5 238V - GB6S 2,650
x1.16
Snapdragon X Plus (X1P-42-100) - GB6S 2,290
x1
GB6 Multi-Core
|
|
Core Ultra 5 238V - GB6M 10,200
x1
Snapdragon X Plus (X1P-42-100) - GB6M 11,030
x1.08
|
|
Core Ultra 5 238V - 136.5GB/s
x1.01
Snapdragon X Plus (X1P-42-100) - 135.2GB/s
x1
|
|
Core Ultra 5 238V - 17W
x1
Snapdragon X Plus (X1P-42-100) - 23W
x1.35
|
|
Core Ultra 5 238V - 3.32 TFLOPS FP32
x1.94
Snapdragon X Plus (X1P-42-100) - 1.71 TFLOPS FP32
x1
|
|
Core Ultra 5 238V - 40 TOPS INT8
x1
Snapdragon X Plus (X1P-42-100) - 45 TOPS INT8
x1.13
|
GB6S 2,650
65%
|
GB6S 2,290
56%
|
|
GB6M 10,200
38%
|
GB6M 11,030
41%
|
|
0%
|
0%
|
|
0%
|
0%
|
|
Manufacturer
Intel
|
Manufacturer
Qualcomm
|
|
Architecture
Lunar Lake
|
Architecture
Oryon
|
|
Family
Core Ultra Series 2
|
Family
X Series
|
|
Instruction Set (ISA)
x86-64
|
Instruction Set (ISA)
AArch64
|
|
Codename
Lunar Lake-MX
P-Core
Lion Cove
E-Core
Skymont
|
Codename
Snapdragon X Elite
-
Phoenix
-
-
|
|
Market Segment
Laptop
|
Market Segment
Laptop
|
|
Release Date
9/3/2024
|
Release Date
9/4/2024
|
|
Foundry
TSMC
TSMC (IO Die)
Intel (FIB Die)
|
Foundry
TSMC
-
-
|
|
Node
N3B
N6 (IO Die)
22nm (FIB Die)
|
Node
N4P
-
-
|
|
Die Size
140 mm²
46 mm² (IO Die)
|
Die Size
170 mm²
-
|
|
Transistor Count
Unknown
|
Transistor Count
Unknown
|
| BGA 2833 |
Unknown
|
|
8 Cores
4 P-Cores
4 E-Cores
|
8 Cores
-
-
|
|
8 Threads
4 P-Threads
4 E-Threads
|
8 Threads
-
-
|
|
P-Core
4.7GHz
-
|
-
3.2GHz
3.4GHz Boost
|
|
E-Core
3.5GHz
|
-
-
|
|
Overclocking
Locked
|
Overclocking
Locked
|
|
Integrated Chipset
|
Integrated Chipset
|
|
L0 Instruction
64KB/Core
8-way set associative
|
L0 Instruction
-
-
|
|
L0 Data
48KB/Core
12-way set associative
|
L0 Data
-
-
|
|
L1 Instruction
-
-
64KB/E-Core
8-way set associative
|
L1 Instruction
192KB/Core
4-way set associative
-
-
|
|
L1 Data
192KB/P-Core
12-way set associative
32KB/E-Core
8-way set associative
|
L1 Data
96KB/Core
2-way set associative
-
-
|
|
L2
2560KB/Core
10-way set associative
-
-
4MB Shared (E-Core)
16-way set associative
|
L2
-
-
24MB Shared
12-way set associative
-
-
|
|
L3
8MB Shared
12-way set associative
|
-
-
-
|
|
-
|
6MB SLC Cache
|
|
Channels
2
|
Channels
8
|
|
Max Memory
32GB
|
Max Memory
64GB
|
|
ECC
Not Supported
|
ECC
Not Supported
|
|
Bus Width/Channel
64Bit
Bus Width
128Bit
|
Bus Width/Channel
16Bit
Bus Width
128Bit
|
|
Clock
4267MHz
Transfer Rate
8533MT/s
|
Clock
4224MHz
Transfer Rate
8448MT/s
|
|
Bandwidth/Channel
68.3GB/s
Bandwidth
136.5GB/s
|
Bandwidth/Channel
16.9GB/s
Bandwidth
135.2GB/s
|
|
TDP
17W
8W cTDP Down
37W Peak
|
TDP
23W
-
-
|
|
Temp
100°C Max
|
-
-
|
|
Included Cooler
|
Included Cooler
|
|
PCIe 5.0 x4 Lanes
PCIe 4.0 x4 Lanes
|
No PCIe
|
|
Arc 130V 1850MHz
896 Shaders
1850MHz
3.32 TFLOPS FP32
|
Adreno X1 1.7T
1024 Shaders
833MHz
1.71 TFLOPS FP32
|
|
AI Boost 4
|
Hexagon
|
|
5 Cores
|
-
|
|
40 TOPS INT8
|
45 TOPS INT8
|
|
No Cellular
|
No Cellular
|
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