AMD Ryzen 9 7900X3D vs M2 Ultra (24C76G)
AMD Ryzen 9 7900X3D
M2 Ultra (24C76G)
|
12 Cores
24 Threads
4.4GHz Clock
|
24 Cores
24 Threads
3.5GHz Clock
|
|
Socket
AM5
|
Socket
Unknown
|
|
iGPU
Radeon 2CU 2200MHz RDNA 2
560 GFLOPS FP32
|
iGPU
76-Core M2 Ultra
27.2 TFLOPS FP32
|
GB6 Single-Core
|
|
Ryzen 9 7900X3D - GB6S 2,840
x1.05
M2 Ultra (24C76G) - GB6S 2,700
x1
GB6 Multi-Core
|
|
Ryzen 9 7900X3D - GB6M 17,460
x1
M2 Ultra (24C76G) - GB6M 21,150
x1.21
CB23 Single-Core
|
|
Ryzen 9 7900X3D - CB23S 1,900
x1.12
M2 Ultra (24C76G) - CB23S 1,695
x1
CB23 Multi-Core
|
|
Ryzen 9 7900X3D - CB23M 27,440
x1
M2 Ultra (24C76G) - CB23M 28,570
x1.04
|
|
Ryzen 9 7900X3D - 83.2GB/s
x1
M2 Ultra (24C76G) - 819.2GB/s
x9.85
|
|
Ryzen 9 7900X3D - 120W
x1
M2 Ultra (24C76G) - 180W
x1.5
|
|
Ryzen 9 7900X3D - 560 GFLOPS FP32
x1
M2 Ultra (24C76G) - 27.2 TFLOPS FP32
x48.57
|
GB6S 2,840
70%
|
GB6S 2,700
67%
|
|
GB6M 17,460
65%
|
GB6M 21,150
79%
|
|
CB23S 1,900
73%
|
CB23S 1,695
65%
|
|
CB23M 27,440
64%
|
CB23M 28,570
66%
|
|
Manufacturer
AMD
|
Manufacturer
Apple
|
|
Architecture
Zen 4
|
Architecture
Apple Silicon 11
|
|
Family
Ryzen 7000
|
Family
M Series
|
|
Instruction Set (ISA)
x86-64
|
Instruction Set (ISA)
AArch64
|
|
Codename
Raphael
Durango
Raphael 2CCD 3D
-
-
-
-
|
Codename
Rhodes-2C
-
M2 Ultra
P-Core
Avalanche
E-Core
Blizzard
|
|
Market Segment
Desktop
|
Market Segment
Desktop
|
|
Release Date
2/28/2023
|
Release Date
6/5/2023
|
|
Foundry
TSMC
TSMC (IO Die)
|
Foundry
TSMC
-
|
|
Node
N5
N6 (IO Die)
|
Node
N5P
-
|
|
Die Size
2x 71 mm²
122 mm² (IO Die)
|
Die Size
940 mm²
-
|
|
Transistor Count
2x 6.6 Billion
3.4 Billion (IO Die)
|
Transistor Count
134 Billion
-
|
| AM5 |
Unknown
|
|
12 Cores
-
-
|
24 Cores
16 P-Cores
8 E-Cores
|
|
24 Threads
-
-
|
24 Threads
16 P-Threads
8 E-Threads
|
|
-
4.4GHz
5.6GHz Boost
|
P-Core
3.5GHz
-
|
|
-
-
|
E-Core
2.42GHz
|
|
Overclocking
Locked
|
Overclocking
Locked
|
|
Type
PCIe
|
Integrated Chipset
-
|
|
Transfer Rate
32GT/s
|
-
-
|
|
Lanes
4
|
-
-
|
|
Bandwidth
16GB/s
|
-
-
|
|
Bi-directional
32GB/s
|
-
-
|
|
L0 Instruction
|
L0 Instruction
|
|
L0 Data
|
L0 Data
|
|
L1 Instruction
32KB/Core
8-way set associative
-
-
|
L1 Instruction
192KB/P-Core
6-way set associative
128KB/E-Core
4-way set associative
|
|
L1 Data
32KB/Core
8-way set associative
-
-
|
L1 Data
128KB/P-Core
4-way set associative
64KB/E-Core
2-way set associative
|
|
L2
1024KB/Core
8-way set associative
-
-
-
-
|
L2
-
-
48MB Shared
12-way set associative
4MB Shared (E-Core)
16-way set associative
|
|
L3
192MB Shared
(64MB V-Cache)
16-way set associative
|
-
-
-
-
|
|
-
|
96MB SLC Cache
|
|
Channels
2
|
Channels
8
|
|
Max Memory
192GB
|
Max Memory
192GB
|
|
ECC
Not Supported
|
ECC
Not Supported
|
|
Bus Width/Channel
64Bit
Bus Width
128Bit
|
Bus Width/Channel
128Bit
Bus Width
1024Bit
|
|
Clock
2600MHz
Transfer Rate
5200MT/s
|
Clock
3200MHz
Transfer Rate
6400MT/s
|
|
Bandwidth/Channel
41.6GB/s
Bandwidth
83.2GB/s
|
Bandwidth/Channel
102.4GB/s
Bandwidth
819.2GB/s
|
|
TDP
120W
|
TDP
180W
|
|
Temp
89°C Max
|
Temp
100°C Max
|
|
Included Cooler
|
Included Cooler
|
|
PCIe 5.0 x24 Lanes
|
No PCIe
|
|
Radeon 2CU 2200MHz RDNA 2
128 Shaders
2200MHz
560 GFLOPS FP32
|
76-Core M2 Ultra
9728 Shaders
1398MHz
27.2 TFLOPS FP32
|
|
No NPU
|
|
|
-
|
32 Cores
|
|
-
|
31.6 TOPS FP16
|
|
No Cellular
|
No Cellular
|
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